MediaTek Dimensity 9400 SoC Is Tipped To Boast More Than 30 Billion Transistors

The higher the number of transistors inside a chip, the more powerful or energy-efficient the chip is. For instance, Apple’s A13 Bionic AP that powers the iPhone 11 series was built by TSMC using its 7nm process node and came loaded with 8.5 billion transistors. Last year’s 3nm A17 Pro AP which powered the iPhone 15 Pro and iPhone 15 Pro Max, carries 19 billion transistors. It seems as if MediaTek is all set to give tough competition to its rivals with the highly anticipated Dimensity 9400.

It is going to be a powerhouse by the chipmaker with a configuration that features one Cortex-X5 Prime CPU core, four Cortex-X4 Prime CPU cores, and four Cortex-A720 performance CPU cores. The most notable feature is that there are no low-power efficiency cores. Moreover, the Cache sizes will be larger and the Dimensity 9400 AP will be reportedly equipped with more than 30 billion transistors.

According to the latest reports, Dimensity 9400 AP will measure 150mm² making it the largest chipset dedicated for a smartphone if it comes later this year. The huge size will allow the SoC to carry a large number of transistors along with a bigger Neural Processing Unit (NPU) for AI and Machine Learning.

Some leaks claim that the Dimensity 9400 SoC will feature the Mali-TKRX MC12 GPU. It hints at a 20% performance hike in graphics over the Dimensity 9300 SoC. It seems to be enough for MediaTek’s new flagship smartphone chip to top the graphics performance of the upcoming Snapdragon 8 Gen 4 chipset.

TSMC will manufacture the Dimensity 9400 AP using its second-generation 3nm node (N3E). Considering all factors, this chipset will probably be the most expensive smartphone chipset ever designed by MediaTek. Last year, several rumors circulated about the Dimensity 9300 overheating due to the Cortex-X5 Prime CPU core. One theory suggests that MediaTek increased the size of the chip’s die to deal with that issue. So, let’s wait and watch what MediaTek Brings to the table with the most expensive chipset to date.